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Presented are the proceedings of the 13th Annual Electronics Manufacturing Seminar, held on 1-3 March 1989 at the Naval Weapons Center, China Lake, Calif.
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We have developed a video detection algorithm for measuring the residue left on a printed circuit board after a soldering process. Oblique lighting improves the contrast between the residue and the board substrate, but also introd...
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We have developed a video detection algorithm for measuring the residue left on a printed circuit board after a soldering process. Oblique lighting improves the contrast between the residue and the board substrate, but also introduces an illumination gradient. The algorithm uses the Boundary Contour System/Feature Contour System to produce an idealized clean board image by discounting the illuminant, detecting trace boundaries, and filling the trace and substrate regions. The algorithm then combines the original input image and ideal image using mathematical models of the normal and inverse Weber Law to enhance the residue on the traces and substrate. The paper includes results for a clean board and one with residue.
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Processes for using a MakerBot Computer Numerical Control (CNC) machine and Fujifilm Dimatix Materials Printer (DMP) were developed to facilitate future research in integrating electronics into structural features. In this project...
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Processes for using a MakerBot Computer Numerical Control (CNC) machine and Fujifilm Dimatix Materials Printer (DMP) were developed to facilitate future research in integrating electronics into structural features. In this project, the concept of structural electronics, or structronics, was investigated. Structronics seek to build wiring and electrical interconnects directly into component structures to diminish the need for structural fasteners. A MakerBot Cupcake CNC was used to investigate the fabrication of plastic structures by printing, and a Fujifilm DMP was used to create flexible Printed Circuit Boards (PCBs). After developing processes to make these machines easier to use, others in the lab will be able to utilize them to develop structures with integrated electronics.
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The feasibility of using ink-jet technology to write circuits on PC board material and TAB substrate has been demonstrated. Several systems were evaluated and the most successful system used paraffin as a resist material on a copp...
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The feasibility of using ink-jet technology to write circuits on PC board material and TAB substrate has been demonstrated. Several systems were evaluated and the most successful system used paraffin as a resist material on a copper substrate. The copper was etched and the paraffin subsequently removed to form the conductive paths of the circuit. Line widths down to 0.004 inch were achieved, and line widths of 0.002 inch were shown feasible. The generation of the print pattern from a computer file illustrated the potential of coupling a circuit writing system to an electrical CAD system to provide turnaround prototype circuits.
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A multilayer printed circuit board is disclosed having appropriate ground and voltage planes. The multi-layer printed circuit board includes a mounting plane, a plurality of dielectric sheets stacked upon the mounting plane, a plu...
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A multilayer printed circuit board is disclosed having appropriate ground and voltage planes. The multi-layer printed circuit board includes a mounting plane, a plurality of dielectric sheets stacked upon the mounting plane, a plurality of conductive sheets positioned between adjacent dielectric sheets, and a plurality of rectangular shaped apertures passing through the multilayer printed circuit board. Each rectangular shaped aperture of the multilayer printed circuit board has a plurality of voltage connector terminals. Electrical connection from one of the conductive sheets to the appropriate voltage connector terminal is provided by a conductive disc which passes through a hole located within the multilayer printed circuit board. (Author)
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By means of design for testability (DFT) techniques, the NOSC Test Technology Office (Code 936) evaluated testability improvements in a state-of-the-art printed-circuit board. Data were gathered to provide a direct comparison amon...
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By means of design for testability (DFT) techniques, the NOSC Test Technology Office (Code 936) evaluated testability improvements in a state-of-the-art printed-circuit board. Data were gathered to provide a direct comparison among various testability figure of merit (TFOM) tools. Keywords include: Design for testability (DFT); Printed-circuit boards; MIL-STD 2165; STAMP; and LOGMOD.
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This report presents reliability prediction models for printed wiring assemblies, solderless wrap assemblies, wrapped and soldered assemblies, and discrete wiring assemblies w/electroless deposited PTH for inclusion in MIL-HDBK-21...
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This report presents reliability prediction models for printed wiring assemblies, solderless wrap assemblies, wrapped and soldered assemblies, and discrete wiring assemblies w/electroless deposited PTH for inclusion in MIL-HDBK-217. Collected field failure rate data were utilized to develop and evaluate the factors. The reliability prediction models are presented in a form compatible with MIL-HDBK-217D, proposed. (Author)
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We have recently reported an experimental study of microwave, 0.5 to 18 GHz, field-to-wire coupling for some basic wire geometries above a ground plane performed in Anechoic (AC) and Reverberation Chambers (RC). Receiving paramete...
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We have recently reported an experimental study of microwave, 0.5 to 18 GHz, field-to-wire coupling for some basic wire geometries above a ground plane performed in Anechoic (AC) and Reverberation Chambers (RC). Receiving parameters and comparisons between measurements in the two chambers were presented. We showed e.g. that the antenna receiving cross section sigma(sub w) of wires measured in the RC follows a sigma(sub w)-distribution with two degrees of freedom. In this report we study the field-to-printed-circuit-board coupling for some single-sided, double-sided, and multi-layer printed-circuit-boards (PCBs) performed in RC. We present receiving parameters including the realized gain G(sub R), the impedance mismatch factor 1, the input resistance R(sub in), the receiving cross section sigma(sub w) and the effective antenna length h(sub e). We show that sigma(sub w) of traces on PCBs also follows a x(sup 2)-distribution with two degrees of freedom. The effective antenna length h(sub e) of traces on PCBs is found to be bounded by the wave length Lambda. The impedance matched receiving cross section is bounded by Lambda(sup 2)/8 pi.
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This report documents progress on the Phase II Development of the ExpendableParticle Sensor (EPS). We determined the noise level of the telemetry system with the Printed Circuit Board (PCB) developed in November 1991. In addition,...
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This report documents progress on the Phase II Development of the ExpendableParticle Sensor (EPS). We determined the noise level of the telemetry system with the Printed Circuit Board (PCB) developed in November 1991. In addition, we had a PCB expansion card made which contained the electronics of receiver end of the telemetry system.
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